NX900 Series 64-Bit High Performance Processor  
NX900 is 64bit. The dual-mode is designed for embedded applications  
that requires high-performance, real-time, cost-effective processing, e.g.  
AIoT edge computing. It is a good replacement for ARM Cortex-M7 / R7  
NX900 Core Complex  
NX900 Core  
DEBUG  
VPU  
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R8 / A35 / A53 / A55 / A9. Detailed Introduction>>>  
NMI  
ECLIC  
TIMER  
DSP  
WFI/WFE  
NICE  
FPU  
MUL/DIV  
9
-Stage  
High Real-  
Time  
Performanc  
e
RV64  
I/M/A/C/F/  
D/P/V  
I/D-Cache  
L2 Cache  
900 uCore  
Security  
(PMP, TEE)  
SP/DP FPU  
& DSP  
Pipeline  
Dual-issue  
I/D-Cache  
ILM  
L2 Cache  
TEE  
PMP  
AXI  
DLM0/DLM1  
AHB-Lite  
Low  
Latency  
Interrupt  
Full  
Development  
Toolkit  
6
4128-bit AXI &  
ILM, DLM  
Interfaces  
4
-wire  
NICE  
Extension  
RISC-V  
Standard Debug  
JTAG  
ISA  
RISC-V RV32 I/M/A/C/F/D/P/V ISA supported  
CPU Core  
9-Stage Pipeline, dual-issue  
Configurable Dynamic Branch Prediction unit  
Configurable Prefetch Unit  
Privileged Modes  
Caches  
Machine-Mode supported  
User-Mode supported  
Supervisor-Mode supported  
I-Cache, configurable Cache size, N-way, Cache Line Size 32Bytes  
D-Cache, configurable Cache size, 2-way, Cache Line Size 32Bytes  
L2-Cache, configurable Cache size  
Bus Interfaces  
64/128-Bit AXI System Bus Interface  
32-Bit AHB-lite (Private Peripheral Interface)  
64-Bit ILM Bus Interface  
64-Bit AXI Slave Port  
2 32-Bit DLM Bus Interface  
Debug  
Standard IEEE 4-wire JTAG supported  
Configurable Hardware Breakpoints  
Security  
Configurable PMP (Physical Memory Protection) feature  
Configurable TEE (Trusted Execution Environment) feature  
Timer  
MMU  
Configurable 64-bit private timer  
Configurabel MMU (memory management unit)  
Supported 2-level TLBs, configurable TLB entries  
Interrupt  
ECLICEnhanced Core Level Interrupt Controller)  
RISC-V standard interrupts supported, including software, timer and external interrupts  
Configurable interrupt numbers, levels and priorities  
Vectored fast interrupts supported  
Nested interrupts supported  
Interrupt tail-chaining supported  
NMI  
VPU  
NMI (Non-Maskable Interrupt) supported  
Support the latest V-extension specification  
Support 8/1/6/32/64 integer data types  
Support SP/DP/FP16/Bfloat floating-point data types  
Configurable vlen 128-bit ~ 512-bit  
FPU  
DSP  
Single/double-precision supported (F, D extensions)  
SIMDPartial-SIMD64-bit and Non-SIMD DSP instructions (P extension)  
Low Power  
NICE Extension  
Tool Kit  
WFIWait For Interruptand WFEWait For EventSupported  
Sleep and Deep Sleep Mode Supported  
Allowing customers to add user-defined instructions  
Implementing application specific hardware co-unit based on NICE interface  
Standard RISC-V Toolchain supported  
Linux/Windows IDE (Integrated Development Environment) supported